This invention relates to oscillator synchronizing systems and, in particular, to synchronizing oscillators from a reference signal substantially different in frequency than the operating frequency of the oscillator.
Master reference oscillators are often used in systems wherein a number of secondary frequencies are derived from the output frequency of the master oscillator. One such use is in television systems wherein a master oscillator operating at a relatively high frequency is coupled to frequency dividers to generate horizontal line and vertical field synchronizing signals, all of which are locked in frequency and phase to the master oscillator. Oscillators designed to serve as master reference oscillators are generally of the types known as oven-stabilized or temperature compensated and, as such, are optimized in performance for a discrete frequency with a limited variable frequency adjustment on the order of .+-.5ppm.
In practice, one or more master oscillators in a system may be combined by way of synchronization which requires that the multiple oscillators be locked together in frequency and phase by what is commonly referred to as generator locking or Genlock operation. In Genlock operation, an external signal, generally at a low rate, e.g., the horizontal line rate in a television system, from one master oscillator which serves as a system reference, is utilized to lock the other master oscillators to the system reference. A phase detector in each master oscillator loop compares its equivalent secondary frequency, e.g., its horizontal line rate signal to the external system reference, which is at the horizontal line rate. Any difference in phasing between the two inputs to the phase detector causes the phase detector to produce an error signal, which is coupled to a control input of the local master oscillator to bring its output signal into phase with the external reference signal, thereby synchronizing the local master oscillator to the system. If the phase difference between the local and system reference frequencies is relatively large, an appreciable time, e.g., up to 60 seconds, may be required before synchronism of all of the secondary frequencies is achieved due to the relatively high rate of division of the master oscillator output frequency used to generate the lower secondary frequency and the limited range of master oscillator variation normally available.
Prior art attempts at reducing the time required for bringing a local master oscillator into synchronism generally require the use of two or more external reference signals. In one such system, a first reference of a frequency at or near the local master oscillator output frequency is used to correct the local master oscillator, while a second reference signal at the lower secondary frequency rate is utilized to reset the divider circuit which develops the lower secondary frequency. However, the substantial difference in the frequency rate of the two or more external reference signals may create a substantial time and phasing displacement of the lower secondary frequency output signal depending on the countdown status of the divider circuit at the time the reset is attempted.